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Silicon Labs /BGM240PA32VNA /DMEM_NS /RAMBANKSVALID

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Interpret as RAMBANKSVALID

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https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/DMEM_NS/RAMBANKSVALID#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RAMBANKSVALID

Description

No Description

Fields

RAMBANKSVALID

Enable bits for RAM banks 0-31

1 (BLK0): Enable RAM block0

3 (BLK0TO1): Enable RAM block0 to block1

7 (BLK0TO2): Enable RAM block0 to block2

15 (BLK0TO3): Enable RAM block0 to block3

31 (BLK0TO4): Enable RAM block0 to block4

63 (BLK0TO5): Enable RAM block0 to block5

127 (BLK0TO6): Enable RAM block0 to block6

255 (BLK0TO7): Enable RAM block0 to block7

511 (BLK0TO8): Enable RAM block0 to block8

1023 (BLK0TO9): Enable RAM block0 to block9

2047 (BLK0TO10): Enable RAM block0 to block10

4095 (BLK0TO11): Enable RAM block0 to block11

8191 (BLK0TO12): Enable RAM block0 to block12

16383 (BLK0TO13): Enable RAM block0 to block13

32767 (BLK0TO14): Enable RAM block0 to block14

65535 (BLK0TO15): Enable RAM block0 to block15

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data